<?xml version="1.0" encoding="UTF-8"  standalone="yes" ?>
<rss version="2.0">
	<channel>
		<title>社群: 艾鍗學院 Blog - 文件區(電子電路)</title>
		<description>台灣數位學習數位教學平台 RSS feed provider</description>
		<language>zh-tw</language>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doclist&amp;folderID=2229</link>
	<item>
		<title>數位電路術科實習-IC7447解碼器</title>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doc&amp;cid=12255</link>
		<description>   </description>
		<pubDate>Wed, 23 Jul 2014 23:43:29 +0800</pubDate>
	</item>
	<item>
		<title>數位電路術科實習-四位元加法器</title>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doc&amp;cid=12254</link>
		<description>   </description>
		<pubDate>Wed, 23 Jul 2014 23:42:10 +0800</pubDate>
	</item>
	<item>
		<title>數位電路術科實習-IC7483四位元二進位加法器</title>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doc&amp;cid=12253</link>
		<description>   </description>
		<pubDate>Wed, 23 Jul 2014 23:41:06 +0800</pubDate>
	</item>
	<item>
		<title>Delta-Sigma ADC Basics</title>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doc&amp;cid=10742</link>
		<description>Delta-Sigma ADC BasicsAug&amp;nbsp;13, 2012,&amp;nbsp;0 comments&amp;nbsp;, in&amp;nbsp;Electrical Engineering,&amp;nbsp;Embedded DesignDelta-sigma ADCs.&amp;nbsp; Not a new technology by any means, yet still they are regarded by many embedded engineers as mysterious and magical.&amp;nbsp; In this post, I’ll go through the basics of delta-sigma ADCs, and delta-sigma modulation on a higher level.Understanding delta-sigma ADCs’ benefits compared to different ADCs (SARs, dual slope, etc) will require a broader understanding of delta-sigma modulation and its application in creating an ADC.&amp;nbsp; The block diagram below describes a delta-sigma modulator (DSM) on a high level.The input signal goes through a subtractor, taking the difference of the input and the output signal (fed through an impulse generator).&amp;nbsp; Remember, this output is a binary density stream!&amp;nbsp; When the output signal is 0, the differences passes the input signal straight through to the integrator.&amp;nbsp; This integrator continues to sum the input until it triggers the compare that follows it (at 0), at which point the output changes from a 0 to Vref.&amp;nbsp; We can think of this as one, for simplicity, but keep in mind that this block diagram is not implementation specific, so 1 may not make sense for every case.&amp;nbsp; When the output signal changes to Vref, the impulse block it passes through causes a very large, negative result from the difference, and thus creates a step down in the integrator’s output, causing the compare result to go to 0 again.&amp;nbsp; All of this can be a little difficult to imagine, so the figure below demonstrates the DSM modulating a DC signal.&amp;nbsp; In theory, the output goes high for an infinitesimally small amount of time, but let’s assume that this is a clocked digital system with a non-infinite impulse function so that we have a useable output.This difference of sums (delta-sigma, ho-ho!) creates a delta-sigma modulated density stream whose duty cycle is equal to Signal In/Vref.&amp;nbsp; So, if Signal In is 0.5 Vref, we will see a 50% duty cycle delta-sigma modulated density stream at the output.I can imagine you saying, “OK, that’s cool, but I thought we were talking about delta-sigma ADCs?”&amp;nbsp; We are, though!&amp;nbsp; This delta-sigma modulation is most of the work required to make a delta-sigma ADC.&amp;nbsp; To make this delta-sigma modulator into an ADC, we must simply count the density output and supply a periodic sample pulse to capture the counter’s result and reset it.&amp;nbsp; This relationship is laid out simply in the block diagram below.This reveals one of the great benefits of the delta-sigma ADC: the process of delta-sigma modulating the input into a density stream and summing it in a counter reduces aliasing of high frequency signals into the pass band greatly.&amp;nbsp; This means the delta-sigma ADC is more resistant to out-of-band noise than other types of ADC.A practical (simple) implementation of the delta-sigma ADC is implemented below.&amp;nbsp; As we can see, the elements from the basic DSM block diagram are created here in their analog counterparts.In coming posts, I’ll talk about the benefits and drawbacks of delta-sigma ADCs as compared to other common ADCs (SAR, dual slope, etc.), and also how better, higher order delta-sigma ADCs can be made.&amp;nbsp; Thanks for reading!http://stuartowen.com/home/2012/08/13/delta-sigma-adc-basics/#!/single_blog     </description>
		<pubDate>Tue, 04 Mar 2014 20:36:18 +0800</pubDate>
	</item>
	<item>
		<title>數位電路術科實習-555 IC 脈波產生器實驗</title>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doc&amp;cid=10319</link>
		<description>艾鍗學院-數位電路術科實習作業繳交   </description>
		<pubDate>Thu, 12 Dec 2013 00:51:58 +0800</pubDate>
	</item>
	<item>
		<title>SSR Relay</title>
		<link>http://lms.xms.com.tw/board.php?courseID=143&amp;f=doc&amp;cid=8602</link>
		<description>固態繼電器的優點高壽命，高可靠:SSR 沒有機械零部件，有固體器件完成觸點功能，由於沒有運動的零部件，因此能在高衝擊，振動的環境下工作，由於組成固態繼電器的元器件的固有特性，決定了固態繼電器的壽命長，可靠性高。&amp;nbsp;靈敏度高，控制功率小，電磁相容性好:固態繼電器的輸入電壓範圍較寬，驅動功率低，可與大多數邏輯積體電路相容不需加緩衝器或驅動器。&amp;nbsp;快速轉換:固態繼電器因為採用固體其間，所以切換速度可從幾毫秒至幾微妙。&amp;nbsp;電磁干擾少:固態繼電器沒有輸入&quot;線圈&quot;，沒有觸點燃弧和回跳，因而減少了電磁干擾。大多數交流輸出固態繼電器是一個零電壓開關，在零電壓處導通，零電流處關斷，減少了電流波形的突然中斷，從而減少了開關瞬態效應。&amp;nbsp;． 無機械式開關之火花問題。． 動作時無噪音。．小型及尺寸共通化、方便安裝。．ON/OFF動作速度快。．具輸入逆向保護。．採用表面貼焊技術，提供最可靠的品質。．具零點觸發方式，可有效避免電磁／高頻干擾。．配安全保護蓋，內裝指示燈（LED）指示其動作。     </description>
		<pubDate>Wed, 30 May 2012 21:43:06 +0800</pubDate>
	</item>
	</channel>
	</rss>
